As we reported previously, TSMC already announced it’s moving to nanosheet GAAFET transistors at 2nm. But the company has also said it will be including backside power rails in a future version of N2, according to Anandtech. The benefit of backside power delivery is increased performance with reduced power consumption. It achieves this by not requiring power to be routed through the front side of the wafer. The company revealed these plans at the European leg of its technology symposium.
TSMC didn’t expand on its decision, but it seems it doesn’t want to add more complications to its move to GAA transistors. It can’t be overstated how big of a leap this is for TSMC, and its competitors. All of these companies have been using FinFET since 2011, so it’s a monumental shift for the industry as a whole. One could reasonably argue it makes sense to take these types of shifts one step at a time. Intel will be taking a similar approach with its N4 to N3 transition.
TSMC is claiming its first N2 node with nanosheets will offer a 10-15 performance boost over N3E. Note that N3 is a FinFET-based architecture. It will be able to offer that performance boost using 25-30 percent less power also. Chip density will also go up a modest 1.1X, and TSMC plans for it to arrive sometime in 2025. It will appear alongside the final version of its FinFlex-based N3X node.
Where things get interesting is when you compare this roadmap to Intel’s. CEO Pat Gelsinger’s “five nodes in four years” strategy has the company moving to GAA transistors in late 2024. And it plans to introduce both RibbonFET (nanowires) and PowerVIA at the same time. Given Intel’s track record with moving to new nodes, nobody knows if Intel will accomplish this. However, at this stage of the game with Alder Lake achieving what it set out to do, nobody is counting Intel out either. To underscore this point, Intel recently announced its second-generation RibbonFET design dubbed 18A is already six months ahead of schedule. This moved it from a 2025 delivery date to late 2024.
The other company to watch here is Samsung, which is reportedly moving to a 3nm GAA architecture any day now. The company has already been at work on its transition from FinFET for several years now, as it revealed its 3nm plans in 2019. It’s going with a nanosheet design called MBCFET, which stands for Multi-Bridge Channel Field Effect Transistor. Although Samsung will likely be the first of the big foundries to enter 3nm production, it’s doubtful it’s keeping Intel and TSMC executives up at night.
The company is alleged to be getting poor yields with its GAA design, but that’s common for such a large technology shift. Still, it doesn’t have the big-name clients like TSMC, nor does it have the CPU engineering pedigree Intel has. It’s also not always best to be first in a race like this. Not everyone wants to be the first customer to try out a totally new technology. A lot of customers might prefer to wait a bit to see the performance of the initial products. It’s similar to how we usually wait to install Windows Updates.
Regardless, it’ll be interesting to see where the chips fall come 2024 or so when these industry titans go head-to-head with their respective GAA designs. Intel has said all along it wants to reclaim the title of “unquestioned leadership” from TSMC; a mantle it lost while it was stalled at 14nm for all those years. If the current roadmaps are fully realized, it will certainly have a leg up on TSMC when it comes to GAA transistors. That will be a huge win for Intel, but it certainly doesn’t guarantee success either, as TSMC has gained an impeccable reputation for its leadership in chip design over the past several years.
In order to change the world’s mind about which company is better — Intel or TSMC — Intel will need to dominate like it used to back in the days of Conroe. Whether or not TSMC’s strategy will hold up to Intel’s aggressive plans is anyone’s bet at this point. One thing is certain though; it’ll be interesting to see it all unfold.